Syllabus

Distance Learning due to CORVID19: https://meet.google.com/zsw-ihqb-ppo

Pease login using your G-Suite account (gm.ncue.edu.tw).

Project Due: June 15, 2022 23:59

Course Title: IC Test Technologies (積體電路測試方法)

Course No. 53028

Semester: Spring, 2022

Time and Classroom: Thu. 09:05-12:00 (E406)

Credits: 3

Lector: Professor Tsung-Chu Huang (黃宗柱)

Email: tch@cc.ncue.edu.tw

Tel. (04)7232105 ext.8384

Website: http://testlab.ncue.edu.tw/tch

Cloud: https://drive.google.com/drive/folders/0B3qNBwukgIG6NnBqN3cxdG1PaXc?resourcekey=0-XAcJDKD9ORPHu9VNB09SBA&usp=sharing

 

(AnsersQuiz1)

• Textbook and References

  • Textbook:

    • L.-T. Wang, C.-W. Wu and X. Wen. "VLSI Test Principles and Architectures." ISBN 10:0-12-370597-5, NY, Elsevier, 2006.

    • M. Abramovici, M. A. Breuer and A. D. Friedman. Digital System Testing and Testable Design." IEEE Press, 1993  (ISBN: 0-71678179-4).

  • Reference:

    • Niraj Jha and Sandeep Gupta. "Testing of Digital Systems."  Cambridge University Press, 2003. (ISBN: 0-521-77356-3).

    • M. Bushnell & V.D. Agrawal. "Essentials of Electronic Testing for Digital, Memory & Mixed-Signal VLSI Circuits." 2000.

    　

• Schedule and Contents

      Week  1    (2/24) Overviews: Introduction to VLSI Testing [PDF, PPT] (Introduction to IC Test Industry)(PDF1-3)

      Week  2    (3/03) Logic Modeling [PDF, PPT] and Logic Simulation [PDF, PPT]

      Week  3    (3/10) Fault Modeling [PDF, PPT], Fault Simulation [PDF, PPT]

      Week  4    (3/17) Single-Stuck-Fault Test-Pattern Generation [PDF, PPT], Internal Model for Fault Simulator and Test Generator [PDF, PPT]

      Week  5    (3/24) Practice on ATPG (Synopsys DfT Compiler/TetraMAX ATPG),

      Week  6    (3/31) Scan Chain [PDF, PPT] (Lab.1-3, see attached links)

      Week  7    (4/07) Project Announcement (S3C: Practice on VLSI Testing using Synopsys's 3 Compilers)

      Week  8    (4/14) Boundary Scan and Practice, TI Boundary-Scan Educator v2.0, Scan Based Design, Built-In Self-Test [PDF, PPT]

      Week  9    (4/21) Midterm Exam

      Week 10   (4/28) Sequential Circuit Testing [PDF, PPT], Test Compaction [PDF, PPT]

      Week 11   (5/05) Memory Test [PDF, PPT, Educator], IDDQ Testing [PDF, PPT], 4-Way Bridge Test.

      Week 12   (5/12) DfR: Error Control Codes [PPT], (Forouzan EDC/ECC) Reliability Test (Confidence Test, BLER/BER/SNR Test)

      Week 13   (5/19) DfR: Residue Codes for ALUs [PPT], Error location (2DPC, OLS, LDPC, Hamming, AN, TCB, RNS, AN, Residue Codes, BCH Codes). [Google Meet Record]

      Week 14   (5/26) Design for Reliability [PPT], Introduction to Fault-Tolerance: n-Detection/time redundancy, DMR/TMR/Spatial redundancy [Google Meet Record]

      Week 15   (6/02) Mixed-Signal Test, Ring Oscillator, Signal Integrity Test. [Google Meet Record]

      Week 16   (6/09) Special topics: Introduction to Design for SoC Testing, Reliability Test

      Week 17   (6/16) (Project Due) FPGA Test, Low-Power Test [PPT].  (Samples and Reviews, PDF, Ans) [Google Meet Record]

      Week 18   (6/23) Final Exam (DOC, PDF)

  　

• Criteria

  • Homework: 10%

  • Midterm Exam: 30%

  • Final Exam: 30%

  • Term Project: 30% (Template)

  　　

• Links

  1. http://www.pld.ttu.ee/diagnostika/introduction.html

  2. http://www.syntest.com.tw/

  3. http://www.asetwn.com.tw/pdf/asekh_test_roadmap_200406.pdf

  4. http://www.cic.edu.tw

  5. https://www.youtube.com/results?search_query=tetramax+tutorial (TetraMAX Tutorial)

  6. http://www.ee.ncu.edu.tw/~jfli/vlsidi/lecture/dft (DfT/TMAX)

  7. TestLab0 Setup (YouTube)

  8. TestLab1 Simple Combinational Circuit using user-defined library  (YouTube)

  9. TestLab2 Simple Combinational Circuit using generic logic library  (YouTube)

  10. TestLab3 Simple Sequential Circuit Scan Synthesis  (YouTube)

  11. Prof. James Li. https://www.youtube.com/playlist?list=PLvd8d-SyI7hjk_Ci0zpTqImAtpEjdK5JF