Major Research Topics


  • Neural Network Acceleration:

  • Digital Neural Network

    • General Error/Activation Function Tabulation

    • Approximate Computing for Batch Learning

    • Residue Number System

    • CORDIC Acceleration

  • Analogue Neural Network

    • Passive Element Comput-ing

    • In-Memory Computing

  • 經網路加速:


  • 3D-IC Testing:

Besides the FinFET, 3D-IC is the major infrastructures for enduring the Moore Law for decades. Through-Silicon Vias (TSVs) are the most critical interconnects in the 3D-IC structures. The design for reliability of TSVs is one of your major researches.

  • 三維晶片測試:


  • Memory Test and Repair:

Memory is one of the circuitry with the greatest growth in volume demand. We are interested in the high-speed testing methodology and high-yield memory repairing techniques.

  • 記憶體測試與修復:


  • Low Power Technologies for SoC Testing:

Power dissipation during testing is at least 2 times of that in normal mode.  We have developed many technologies to reduce the average and the peak power dissipation during test.  We also have fruitful results in transition-based power simulation and estimation

  • 系統晶片之低功耗測試:

晶片於測試時的功率消耗最少在正常模式時的兩倍。本研究團隊已研究出數種有效降低測試時平均功耗與尖峰功耗的技術。 我們對狀態轉移式的功耗模擬評估也有豐碩成果。

  • Low Leakage Design:

Our research also includes power management and low leakage design.  We focus on the supply-gating current spike reduction, MTCMOS sleep transistor allocation and low power logic design.

  • 低功(低漏電功耗)設計:


  • Time-to-Digital and Jitter Measurement:

Our research also includes some in mixed-signal design.  We are interested in developing small-area low-power digital designs to measure time including T2D, jitter measurer, and the BIST for DPWM and PLLs.

  • 時間數位轉換與抖動量測: