Term Project

Due: by the date for practical examination.

• Given

  1. Preliminary examples: c17, c432

  2. All ISCAS85 benchmarks

  　

• Given a reference, modify the iscas85.c to a simple Verilog parser.

• Choose one function as your target: simple logic generator, tdl-to-Verilog or Verilog-to-tdl transformer, Verilog-to-Ccode transformer