Agenda at-a-Glance
| 7/10 (Mon) | 7/11 (Tue) | 7/12 (Wed) | |||||||
| 09:00-09:10 | Opening | 09:00-09:50 |
Keynote Speech Prof. S.-Y. Huang, NTHU, Taiwan "Eye in the Sky -- Health Condition Monitoring for IoT Devices in the Field" Chair: Prof. Jin-Fu Li, NCU |
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| 09:10-10:00 | Keynote Speech Prof. Seiji Kajihara, KyuTech, Japan "Right Power Testing for Scan-Based BIST and Its Evaluation with TEG Chips" Chair: Prof. Shyue-Kung Lu, NTUST |
09:50-10:10 | Break | ||||||
| 10:00-10:50 | Invited Talk Director C.F. Wu, RealTek, Taiwan "Decision Making for Complex SoCs" Chair: Prof. Chih-Tsun Huang, NTHU |
10:10-11:30 |
Academic-Industrial Panel Chair: Charles H.-P. Wen, NCTU "The Trends and Challenges of Automotive Test and Reliability"
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| 10:50-11:10 | Break | 11:30-11:40 |
Best Paper Award Program Chair: Prof. S.-M. Li, NSYSU |
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| 11:10-12:10 | Paper Session 1 Clock Test/Synthesis and Debug/Verification Chair: Prof. Ching-Hwa Cheng, FCU |
11:40-12:00 | Lunch Box & Farewell | ||||||
| 12:10-14:00 |
Registration & Reception (Hostel) Lunch (Oriental, Lalu) |
12:10-13:30 | Lunch (Oriental, Lalu) | ||||||
| 14:00-15:30 |
Tutorial 1 Chair: Prof. S.-M. Li, NSYSU Lecturer: Prof. Gang Qu, UMD, US "Challenges about Hardware Security" |
The 3rd
VTTF
2017 Technical Session Chair: Prof. T.-C. Huang, NCUE |
13:30-14:15 | Paper Session 2 Memory Test and Repair Chair: Prof. Jing-Jia Liou, NTHU |
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| 14:20-15:20 | Paper Session 3 Error Detection and Correction Chair: Prof. Chun-Lung Hsu, ITRI |
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| 15:30-16:00 | Break & Check-in | 15:20-16:00 | Poster Session & Break Chair: Prof. Yingchieh Ho, NDHU |
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| 16:00-17:30 | Tutorial 2 Chair: Prof. S.-M. Li, NSYSU Lecturer: Prof. Charles H.-P. Wen, NCTU "Study on Soft Error Rate (SER): Past, Present, and Future" |
The 3rd
VTTF
2017 Discussions Chair: Prof. T.-C. Huang, NCUE |
16:00-16:45 | Paper Session 4 Scan Test and FPGA Formatter Chair: Prof. Jwu-E Chen, NCU |
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| 17:30-18:00 | Break & Check-in | 16:50-17:50 | Paper Session 5 Mixed-Signal Chair: Prof. Soon-Jyh Chang |
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| 18:00-20:00 | Reception (Lake-view, Lalu) | 18:00-20:00 | Banquet (Hostel) | ||||||
| 20:00-21:30 | Review Meeting Chair: Prof. Meng-Leih Sheu |
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Objectives
With the advent of new FinFET transistors, multi-die integration technologies, and various new applications such as automotive electronics, biomedical electronics, and Internet of Things (IoT), there are various emerging challenges in VLSI Test Technology, which is critical not just to ensure the quality of an electronic device, but also its reliability, security, and safety in the field. To cope with these new challenges, the VLSI Test Technology Workshop (VTTW) provides an open forum for researchers and industrial practitioners to brainstorm innovative ideas on solving various testing related problems, including design-for-testability, diagnosis, repair/yield learning, online testing and reliability enhancement techniques, etc.